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Microwave GaN-on-Si HEMTs compatible with non-gold metal stack

Jan 14, 2013
The devices are believed to exhibit the lowest specific contact resistivity (rc) ever reported for CMOS-compatible non-gold ohmic contacts for conventional gallium nitride HEMTs on a silicon substrate

Researchers from Nanyang Technological University, Singapore have demonstrated 0.15 m gate-length AlGaN/GaN high-electron-mobility transistors (HEMTs) with direct-current and microwave performances.

The scientists, led by Professor G. I. Ng, say that this is the first microwave performance GaN-on-silicon HEMTs with improved ohmic contact using complementary metal-oxide-semiconductor (CMOS)-compatible non-gold metal stack.

The silicon/tantalum (Si/Ta)-based ohmic contact exhibited the lowest contact resistance (Rc = 0.24 Ω-mm) ever reported thus far with as smooth surface morphology.

This work demonstrates the feasibility of achieving high performance GaN-on-silicon HEMTs using a non-gold metal stack approach which is compatible to the CMOS process in large-volume silicon manufacturing lines.

The fabricated GaN HEMTs exhibited maximum drain current density (IDmax) of 830 mA/mm, a maximum extrinsic transconductance (gmmax) of 250 mS/mm, and a threshold voltage (Vth) of -3.75 V. The measured current gain cut-off frequencyfTand maximum oscillation frequency fmax are 39 GHz.

The devices also achieved a breakdown voltage of 90 V with a minimum drain current collapse of less than 10 percent for a gate-drain spacing of 1.7 m. The device Johnson’s figure of merit (J-FOM = fTBVgd) is in the range between 3.51 THz.V to 3.83 THz.V which is comparable to other reported GaN HEMTs on silicon with a conventional III-V gold-based ohmic contact process.

The GaN HEMT structure was grown by MOCVD with a 2-nm thick GaN cap layer, 18-nm thick Al0.26Ga0.74N barrier, 800-nm thick GaN buffer and 1.4-m thick transition layer on 4 inch silicon (111) (resistivity > 6000 Ω-cm).

The grown structure exhibited room temperature 2-dimensional electron gas (2-DEG) mobility of 1450 cm2/V.s and sheet carrier density of 1.1x1013 cm-2. An optimised Ta/Si-based ohmic contact metal scheme (Ta/Si/Ti/Al/Ni/Ta) revealed repeated low Rc value of 0.24 Ω-mm (standard deviation of 0.07 Ω-mm) out of 3 separate runs with an average specific contact resistivity (rc) of 1.25x10-6 Ωcm2.

This is believed to be the lowest ever reported for CMOS-compatible non-gold ohmic contacts for conventional GaN HEMTs on silicon and it is also lower than that of recessed ohmic contacts.

With reference to the conventional gold-based ohmic contact [Figure 1(a)], the CMOS-compatible non-gold ohmic metal stack provides a smooth surface morphology with good edge definition [Figure 1 (b)].


Figure 1 (a) Conventional III-V gold-based Ohmic contact with rough morpholoty, (b) Non-gold Ohmic contact with smooth surface morphology

This simple ohmic scheme also avoids the need to use other complicated techniques such as an ohmic recess or a regrown ohmic contact, which will complicate the manufacturing process. The fabricated devices have also exhibited very low current collapse (less than 10 percent) at gate- and drain-quiescent biases (Vgs0 = -8 V, Vds0 = 10 V) [Figure 1 (c)]. Further device improvement can be realised by optimising the GaN HEMT epi-structure and by reducing the device parasitics.



Figure 1 (c) Pulsed (pulse width = 200 ns; pulse period = 1 ms) IDS-VDS characteristics of fabricated GaN HEMTs on silicon using CMOS compatible non-gold metal stack.

This research work is supported by SERC-A*STAR under the TSRP program grant No.102-169-0126.

Further details of this research are described in the paper, "Demonstration of Submicron-Gate AlGaN/GaN High-Electron-Mobility Transistors on Silicon with Complementary Metal–Oxide–Semiconductor-Compatible Non-Gold Metal Stack," by S. Arulkumaran, G. I. Ng, S. Vicknesh et al, in Applied Physics Express 6, 016501 (2013). DOI:10.7567/APEX.6.016501

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